Book Details

Switching Theory and Logic Design

Switching Theory and Logic Design

Published by uLektz

Course Code:ULZ0409

Author:uLektz

University: General for All University

Regulation:2016

Categories:Electrical & Electronics

Format : ico_bookePUB3 (DRM Protected)

Type :eBook

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Topics
UNIT I REVIEW OF NUMBER SYSTEMS & CODES

1.1 Representation of numbers of different radix, conversation from one radix to another radix, r-1's compliments and r's compliments of signed members, problem solving

1.2 4 bit codes, BCD, Excess-3, 2421, 84.2-1 9' compliment code etc.,

1.3 Logic operations, Error detection & correction codes, EX-OR, EX-NOR - Gates - Basic logic operations - NOT, OR, AND,Universal building blocks, Standard SOP and POS, Forms, Gray code, Error detection, error correction codes (parity checking, even parity, odd parity, Hamming code)

1.4 NAND-NAND and NOR-NOR realizations

UNIT II MINIMIZATION TECHNIQUES

2.1 Boolean theorems, principle of complementation & duality

2.2 De-morgan theorems, Minimization of logic functions using Boolean theorems

2.3 Minimization of switching functions using K-Map up to 6 variables

2.4 Tabular minimization

2.5 Problem solving (code-converters using K-Map etc.,) - Binary to BCD Convertor, BCD to Binary Converter, BCD to Excess 3 Converter, Excess-3 to BCD Code Converter, Binary To Gray Code Converter, Gray Code To Binary Code Converter, BCD to Gray Code Converter

UNIT III COMBINATIONAL LOGIC CIRCUITS DESIGN

3.1 Design of Half adder, full adder

3.2 Half subtractor, full subtractor - Applications of full adders

3.3 4-bit binary subtractor - Adder-subtractor circuit

3.4 BCD adder circuit - Excess 3 adder circuit, look-ahead adder circuit

3.5 Design of decoder, 4-bit digital comparator - Demultiplexer, 7 segment decoder, Higher order de multiplexing, Encoder, Multiplexer, higher order multiplexing, Realization of Boolean functions using decoders and multiplexers, Priority encoder

3.6 4-bit digital comparator

UNIT IV INTRODUCTION OF PLD's

4.1 PROM, PAL, PLA-Basics structures

4.2 Realization of Boolean function with PLDs

4.3 Programming tables of PLDs

4.4 Merits & demerits of PROM, PAL, PLA comparison

4.5 Realization of Boolean functions using PROM, PAL, PLA

4.6 Programming tables of PROM, PAL, PLA

UNIT V SEQUENTIAL CIRCUITS I

5.1 Classification of sequential circuits (synchronous and asynchronous)

5.2 Basic flip-flops, truth tables and excitation tables (nand RS latch, nor RS latch, RS flip-flop, JK flip-flop, T flip-flop, D flip-flop with reset and clear terminals)

5.3 Conversion from one flip-flop to flip-flop

5.4 Design of ripple counters

5.5 Design of synchronous counters - Johnson counter, Ring counter

5.6 Design of registers - Buffer register, control buffer register, Shift register, Bi-directional shift register, Universal shift register

UNIT VI SEQUENTIAL CIRCUITS II

6.1 Finite state machine, Analysis of clocked sequential circuits

6.2 State diagrams, State tables

6.3 Reduction of state tables and state assignment, design procedures

6.4 Realization of circuits using various flip-flops

6.5 Meelay to Moore conversion and vice-versa

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