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Book Details

SWITCHING CIRCUITS AND LOGIC DESIGN

SWITCHING CIRCUITS AND LOGIC DESIGN

Published by uLektz

Course Code : PCS3I101
Author : uLektz
University : Biju Patnaik University of Technology (BPUT)
Regulation : 2016
Categories : Computer Science
Format : ico_bookePUB3 (DRM Protected)
Type : eBook

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Description :SWITCHING CIRCUITS AND LOGIC DESIGN of PCS3I101 covers the latest syllabus prescribed by Biju Patnaik University of Technology (BPUT) for regulation 2016. Author: uLektz, Published by uLektz Learning Solutions Private Limited.

Note : No printed book. Only ebook. Access eBook using uLektz apps for Android, iOS and Windows Desktop PC.

Topics
UNIT - I INTRODUCTION AND DIGITAL SYSTEMS

1.1 Introduction: Logic design

1.2 Transistors as switches, CMOS gates

1.3 Sequential circuits, some examples

1.4 Digital Systems: Representation of numbers, binary codes, Gray code

1.5 Error-detecting and error-correcting codes

1.6 Registers

1.7 Binary logic, basic logic gates

UNIT - II BOOLEAN ALGEBRA AND MINIMIZATION OF BOOLEAN FUNCTIONS

2.1 Boolean Algebra: Boolean operations, Boolean functions

2.2 Algebraic manipulations - minterms and maxterms-Sum-of-products and product-of-sum representations

2.3 Two-input logic gates

2.4 Functional completeness

2.5 Minimization of Boolean Functions: Karnaugh map, don't-care conditions

2.6 Prime implicants, Quine-McCluskey technique

2.7 Logic gates, NAND/NOR gates-Universal gates

UNIT - III COMBINATIONAL AND SYNCHRONOUS SEQUENTIAL CIRCUITS

3.1 Combinational Circuits: Adder, Subtractor

3.2 Multiplier

3.3 Comparator

3.4 Decoders, Encoders

3.5 Multiplexers, Demultiplexers, MUX Realization of switching functions

3.6 Parity bit generator

3.7 Code-converters

3.8 Hazards and hazard free realizations

3.9 Synchronous Sequential Circuits: Finite-state maches

3.10 Latches and flip-flops (SR, D, JK, T), Synthesis of clocked sequential circuits, Steps in synchronous sequential circuit design

3.11 Design of modulo-N Ring & Shift counters

3.12 Serial binary adder

UNIT - IV REGISTERS AND COUNTERS AND ALGORITHMIC STATE MACHINES

4.1 Registers and Counters: Registers and shift registers

4.2 Sequential adders

4.3 Binary and BCD Ripple counters, Synchronous counters

4.4 Algorithmic State Machines: Salient features of the ASM chart-Simple example-System design using data path and control subsystems-Control implementations-Examples of Weighing machine and Binary multiplier

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