Book Details

Computer Architecture & Organization

Computer Architecture & Organization

Published by uLektz

Course Code:RT41044

Author:uLektz

University: JNTU Kakinada

Regulation:2013

Categories:Electronics & Communication

Format : ico_bookePUB3 (DRM Protected)

Type :eBook

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Description :Computer Architecture & Organization of RT41044 covers the latest syllabus prescribed by JNTU Kakinada for regulation 2013. Author: uLektz, Published by uLektz Learning Solutions Private Limited.

Note : No printed book. Only ebook. Access eBook using uLektz apps for Android, iOS and Windows Desktop PC.

Topics
UNIT-I BASIC STRUCTURE OF COMPUTERS

1.1 Computer Types, Functional units

1.2 Basic operational concepts, Bus structures, Software, Performance, multiprocessors and multi computers

1.3 Data types, Complements, Data Representation. Fixed Point Representation. Floating – Point Representation. Error Detection codes

1.4 COMPUTER ARITHMETIC: Addition and subtraction, multiplication Algorithms, Division Algorithms

1.5 Floating point Arithmetic operations. Decimal Arithmetic unit, Decimal Arithmetic operations

UNIT-II REGISTER TRANSFER LANGUAGE AND MICRO-OPERATIONS

2.1 Register Transfer language. Register Transfer, Bus and memory transfer

2.2 Arithmetic Micro-operations, logic micro operations, shift micro-operations, Arithmetic logic shift unit. Instruction codes.

2.3 Computer Registers Computer instructions –Instruction cycle.

2.4 Memory Reference Instructions. Input On put and Interrupt.

2.5 CENTRAL PROCESSING UNIT - Stack organization. Instruction formats. Addressing modes

2.6 DATA Transfer and manipulation. Program control. Reduced Instruction set computer

UNIT-III MICRO PROGRAMMED CONTROL

3.1 Control memory, Address sequencing, micro program example

3.2 Design of control unit-Hard wired control

3.3 Micro programmed control

UNIT-IV THE MEMORY SYSTEM

4.1 Memory Hierarchy, Main memory, Auxiliary memory, Associative memory,

4.2 Cache memory

4.3 Virtual memory

4.4 Memory management hardware

UNIT-V INPUT-OUTPUT ORGANIZATION

5.1 Peripheral Devices, Input-Output Interface, Asynchronous data transfer Modes of Transfer

5.2 Priority Interrupt, Direct memory Access

5.3 Input –Output Processor (IOP), Serial communication.

UNIT-VI PIPELINE AND VECTOR PROCESSING

6.1 Parallel Processing

6.2 Pipelining, Arithmetic Pipeline, Instruction Pipeline, RISC Pipeline Vector Processing, Array Processors.

6.3 Multi processors: Characteristics of Multiprocessors, Interconnection Structures, Inter processor Arbitration

6.4 Inter processor Communication and Synchronization, Cache Coherence

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